1. Field of the Invention
The present invention relates to a multiprocessor control system wherein a request for access to a main storage unit is always transmitted among all main storage control units. The access request control for a main storage unit is operated synchronously for each of the main storage control units.
2. Description of the Related Art
There is an increasing need for computers having more functions and higher speeds. For example, even in a vector processing unit, which calculates matrices, a multiprocessor system is usually used, and when a plurality of vector processing units or the like are operated simultaneously with a common main storage unit, the system must have a sufficient throughput. In a multiprocessor system, usually a plurality of main storage units and a plurality of information processing units, i.e., processing elements, are connected to the main storage control units, and a plurality of information processing units have access to a plurality of main storage units.
When a system having one main storage control unit is expanded to become a multiprocessor system having a plurality of main storage control units, one main storage control unit controls only predetermined main storage units and the other main storage control units control all of the other main storage units except for the above predetermined main storage units.
When a processing unit requires access to a main storage unit, first the processing unit transmits a request to a main storage control unit to which the processing unit is connected, through a bus, and then the main storage control unit receiving the request determines whether the request is for a main storage unit which it controls, or for the other main storage control units which it does not control. If the main storage unit is one which is controlled by the main storage control unit, the main storage control unit accesses that main storage unit. But, if the main storage unit is controlled by another main storage control unit, the main storage control unit transmits the request to the other main storage control unit, and the other main storage control unit carries out the access processing.
Predetermined main storage units are connected to a main storage control unit, and thus each main storage control unit independently has access to main storage units which it controls (hereinafter, local units). When access to main storage units not controlled by the main storage control (hereinafter, remote units) is required, another main storage control unit connected to the main storage units carries out the access processing.
The above-mentioned system can be used in many cases if a processing unit processes one piece of data per one instruction, as in a general computer. But, if a processing unit processes many pieces of data per one instruction, as in a vector processing unit, is applied to the system, a request priority acquisition state becomes unbalanced, since the system must maintain the order of data within that one instruction. Accordingly, a main storage control unit must be provided with a table for managing a state of another main storage control unit, and a problem arises in that a delayed control of the signals becomes difficult.
In a general purpose computer, for example, an address allocation for a main storage unit is executed in a 4k byte group using a page interleave. In a vector processing unit, however, a high throughput of 4.times.8 bytes during each cycle is required, and thus an 8 bytes interleave is applied. In addition, since 4 elements of data are processed during each cycle, a simultaneous data transmission and reception from the main storage unit becomes necessary. In this case, during a data fetch, the vector processing unit must fetch 4.times.8 bytes of data in parallel to a vector register therein from main storage units. Therefore, a reduction of the difference in the data transmission time becomes necessary. Further, priority acquisition signals must be transmitted between the main storage control units, and remote priority acquisition information must be controlled by providing tables or the like. Accordingly, control becomes extremely complicated and the performance level is lowered.
The present invention is intended to solve the above problems.
Note: As a publication relating to this invention, please refer to U.S. Pat. No. 4,718,006.